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Computer Science · Q18

Digital Computer Electronics

Engineering and GATE · Computer Science · question 18

Q18

The output 0 and 1 levels for TTL logic family is approximately

A.
0.1 and 5 V
B.
0.6 and 3.5 V
Answer
C.
0.9 and 1.75V
D.
-1.75 and -0.9 V
E.
None of the above

Answer: Option B

Solution

Answer: Option B
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