Q164
For the circuit shown in the figure, the delay of the bubbled NAND gate is 2 ns and that of the counter is assumed to be zero. If the clock (Clk) frequency is 1 GHz, then the counter behaves as a
For the circuit shown in the figure, the delay of the bubbled NAND gate is 2 ns and that of the counter is assumed to be zero.
If the clock (Clk) frequency is 1 GHz, then the counter behaves as a
If the clock (Clk) frequency is 1 GHz, then the counter behaves as a
A.
mod-5 counter
B.
mod-6 counter
C.
mod-7 counter
D.
mod-8 counter
AnswerAnswer: Option D
Solution
Answer: Option D
No explanation is given for this question Let's Discuss on Board