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ECE · Q265

Digital Electronics

Engineering and GATE · ECE · question 265

Q265

Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1Q0 sequence 00 → 01 → 11 → 10 → 00 → . . . . . The inputs D0 and D1 respectively should be connected as

Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q1Q0 sequence
00 → 01 → 11 → 10 → 00 → . . . . .
The inputs D0 and D1 respectively should be connected as
Digital Electronics mcq question image
A.
Answer
B.
C.
D.

Answer: Option A

Solution

Answer: Option A
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