Vidyalelo
ECE · Q172

Digital Electronics

Engineering and GATE · ECE · question 172

Q172

The following Finite State Machine (FSM) is used to detect a particular pattern in input data stream. Whenever the pattern is matched at input, output is set to '1' or else output is cleared to '0'. For which of the following data stream, output goes to '1' twice?

The following Finite State Machine (FSM) is used to detect a particular pattern in input data stream. Whenever the pattern is matched at input, output is set to '1' or else output is cleared to '0'. For which of the following data stream, output goes to '1' twice?
Digital Electronics mcq question image
A.
0010011010010101
B.
0101011000010101
C.
0011011010010101
Answer
D.
1100100101001010

Answer: Option C

Solution

Answer: Option C
No explanation is given for this question Let's Discuss on Board