The reason for the implementation of the cache memory is . . . . . . . .
A. To increase the internal memory of the system
B. The difference in speeds of operation of the processor and memory
C. To reduce the memory access and cycle time
D. All of the mentioned
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The process wherein the processor constantly checks the status flags is called as . . . . . . . .
A. Polling
B. Inspection
C. Reviewing
D. Echoing
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IDE stands for . . . . . . . .
A. Integrated Device Electronics
B. International Device Encoding
C. Industrial Decoder Electronics
D. International Decoder Encoder
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When we perform subtraction on -7 and -5 the answer in 2's complement form is . . . . . . . .
A. 11110
B. 1110
C. 1010
D. 0010
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The SCSI BUS is connected to the processor through . . . . . . . .
A. SCSI Controller
B. Bridge
C. Switch
D. None of the mentioned
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The I/O devices form the . . . . . . . . of the tree structure.
A. Leaves
B. Subordinate roots
C. Left subtrees
D. Right subtrees
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The . . . . . . . . is used to coordinate the operation of the multiplier.
A. Controller
B. Coordinator
C. Control sequencer
D. None of the mentioned
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We make use of . . . . . . . . circuits to implement multiplication.
A. Flip flops
B. Combinatorial
C. Fast adders
D. None of the mentioned
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The SCSI BUS uses . . . . . . . . arbitration.
A. Distributed
B. Centralised
C. Daisy chain
D. Hybrid
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What does the end instruction do?
A. It ends the generation of a signal
B. It ends the complete generation process
C. It starts a new instruction fetch cycle and resets the counter
D. It is used to shift the control to the processor
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Which method of representation has two representations for '0'?
A. Sign-magnitude
B. 1's complement
C. 2's complement
D. Both Sign-magnitude and 1's complement
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Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
A. A
B. B
C. Both take the same time
D. Insufficient information
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VLIW stands for?
A. Very Long Instruction Word
B. Very Long Instruction Width
C. Very Large Instruction Word
D. None of the above
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The private space gets allocated to each subroutine when . . . . . . . .
A. The first statement of the routine is executed
B. When the context switch takes place
C. When the routine gets called
D. When the Allocate instruction is executed
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In vectored interrupts, how does the device identify itself to the processor?
A. By sending its device id
B. By sending the machine code for the interrupt service routine
C. By sending the starting address of the service routine
D. None of the mentioned
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The method followed in case of node failure, wherein the node gets disabled is . . . . . . . .
A. STONITH
B. Fibre channel
C. Fencing
D. None of the mentioned
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When the page table is placed in the main memory, the . . . . . . . . is used to store the recently accessed pages.
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The return address of the Sub-routine is pointed to by . . . . . . . .
A. IR
B. PC
C. MAR
D. Special memory registers
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To organise large memory chips we make use of . . . . . . . .
A. Integrated chips
B. Upgraded hardware
C. Memory modules
D. None of the mentioned
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Individual control words of the micro routine are called as . . . . . . . .
A. Micro task
B. Micro operation
C. Micro instruction
D. Micro command
Select an option to see the answer and solution.