First In First Out (FIFO) is used in-
A. Stack
B. Linked list
C. Queue
D. Tree
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Is there any error found in the given instruction? If yes, find the right alternate. (8086 ALP) MOVES, DS
A. NO error
B. MOV CH, BH
C. MOV CH, BL
D. Both B and C
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If contents of the accumulator in 8085 are 81 H and carry flag is '0', find accumulator contents after executing the instruction RRC?
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The number of 8259 interrupt controllers required to be cascaded to provide interrupt facility to a maximum of 29 different devices are
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What is the duration of the bus-cycle in an 8086 based microcomputer, if the clock frequency is 12 MHz without any wait - states?
A. 83 ns
B. 581 ns
C. 332 ns
D. 249 ns
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In RAM chip with a total of 8096 words, the word addresses ranges from
A. 1 to 8096
B. 0 to 8095
C. 1 to 8095
D. 0 to 8096
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In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected. Such an interrupt is
A. Non-maskable and non-vectored
B. Maskable and non-vectored
C. Non-maskable and vectored
D. Maskable and vectored
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Which of the following is not a basic element within the microprocessor?
A. Microcontroller
B. Arithmetic Logic Unit (ALU)
C. Temporary register
D. Accumulator
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The statement label in a subroutine
A. May be the same as in the main program
B. Is always the same as in the main program
C. Cannot be the same as in the main program
D. Cannot be used
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The interfacing device used for generation of accurate time delay in microcomputer system is
A. Intel 8251
B. Intel 8259
C. Intel 8257
D. Intel 8253
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After complete execution of the program in IC 8085 Microprocessor, PC contains . . . . . . . . and SP contains . . . . . . . .
Memory address in hex
Instruction
2000
LXI SP, 1000
2003
PUSH H
2004
PUSH D
2005
CALL 2050
2008
POP H
2009
HLT
A. 100B, 0FFF
B. 200F, FFF0
C. 200B, FFFF
D. 200A, 0FFC
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An active low signal INTA is not needed from µP to service which of the following interrupt request?
A. TRAP
B. INTR
C. RST 7.5
D. RST 5.5
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If interrupt service request have been received from all of the following interrupts, then which one will be serviced last?
A. RST 5.5
B. RST 6.5
C. RST 7.5
D. None of these
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Which one of the following signal is used in DMA operation?
A. IO/M
B. READY
C. HOLD and HLDA
D. RD and WR
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Match
List-I with
List-II and select the correct answer using the options given below the lists:
List-I BHE A 0
List-II What is read/written?
a. 0 0
1. 1 bytes from/to odd address
b. 0 1
2. 1 byte from/to even address
c. 1 0
3. 1 16-bit word
d. 1 1
4. NOP
A. a-4, b-2, c-1, d-3
B. a-3, b-1, c-2, d-4
C. a-4, b-1, c-2, d-3
D. a-3, b-2, c-1, d-4
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SIM stands for:
A. Select interrupt mask
B. Sorting interrupt mask
C. Set interrupt mask
D. Signal interrupt mask
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PLA (Programmable Logic Array) uses processor returns to
A. ROM matrices
B. PROM matrices
C. RAM matrices
D. EPROM matrices
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In the circuit shown, the device connected to Y5 can have address in the range
A. 2000 H - 20FF H
B. 2D00 - 2DFF H
C. 2E00 H - 2EFF H
D. FD00 - FDFF H
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What will be content of Stack Pointer if following assembly code of 8051 microcontroller is executed immediately after reset?
PUSH 00h
POP 01h
POP 02h
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. . . . . . . . port does not have pull-up resistors in 8051.
A. Port 0
B. Port 1
C. Port 2
D. Port 3
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