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Microprocessors And Microcontrollers
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The advantage of cycle stealing in DMA is that
1. It increases the maximum I/O transfer rate.
2. It reduces the interference by the DMA controller in the CPU's memory access.
3. It is beneficially employed for I/O device with shorter bursts of data transfer.
Which of the above statements are correct?

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The assembler directive in 8086 called EQU

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During direct memory access (DMA), the INTR and INTA (interrupt and interrupt acknowledge) lines:

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In 8085 which of following has highest priority?

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Which of the following computation will take minimum number of clock cycles, if it is implemented on 8051 micro-controller? Following is variable declaration in c code:
Unsigned int a, b;

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When the 8051 is reset and the line is HIGH, the program counter points to the first program instruction in the

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On receiving an interrupt from an I/O device, the CPU

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In 8086 instruction set, the instructions to adjust the product to unpacked BCD digits during multiplication/division are

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For accurate clock period in 8085 it is preferable to use

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If    is used as the chip select logic of a 4K RAM in an 8085 system, then its memory range will be

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What is the content of accumulator (8085) after execution of the following program
MVI A, FF H
ADI 01 H

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The content of which of the following determines the state of the CPU at the end of the execute cycle (when the interrupt is recognized)?
1. Program counter
2. Processor register
3. Certain status conditions
Select the correct answer using the options given below:

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In an 8085 microprocessor using three byte instruction, the lower order address byte is placed in the memory first followed by the higher order address byte. This is because of the design of

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A 32 KB RAM is interfaced to 8085 microprocessor starting from 20FFH. The ending address would be

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MOV AL, OFAH is an example of

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In 8086, if the content of the code segment register is 1 FAB and the content of the IP register is 10A1, then the effective memory address is

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Which instruction in an 8085 processor can set a flag?

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Microprocessor 8085 is the enhanced version of the following with essentially the same construction set

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Consider the following instructions of 8085 microprocessor
1. MOV B, C
2. STA address
3. ORI byte
The correct sequence in the decreasing order of their respective memory space requirement is

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In 8053/8054 timer, how many independent counters are available?

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