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Microprocessors And Microcontrollers
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TRAP is . . . . . . . . whereas RST7.5, RST6.5, RST5.5 are

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Hand held programmers are used for programming

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Each machine cycle of 8051 corresponds to

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In order to enable RST 5.5, RST 6.5 and RST 7.5 interrupts. Which of the following instructions are needed?

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In a multi-processor configuration, two coprocessors are connected to the host 8086 processor. The two co-processor instruction sets

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Consider the following instruction:
EI
MVI A, 08H
SIM
It means

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The pipelined architecture of the 8086 allows the fetch & execute cycles to . . . . . . . . instructions/clock cycle

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An I/O processor controls the flow of information between

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Which of the following are included in the architecture of a computer?
1. Addressing modes, CPU
2. Instruction modes, data formats
3. Secondary memory, operating system
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What is the maximum internal clock frequency of 8086 microprocessor?

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Normally PUT instruction is programmed in which part of the logic unit in a PLC program?

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The clock frequency of an 8085 microprocessor based system is 3 MHz. What should be the minimum pulse width of the INTR signal so that it is recognized successfully?

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In a 8085 microprocessor, the shift registers which store the result of an addition and the overflow bit are, respectively

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The three basic sections of microprocessor are:

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The action performed by the following instruction of 8086.
MOV [1234H], AX

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What is the maximum number of I/O devices can be interfaced with 8085 using I/O mapping of I/O device technique?

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Which one of the following is not correct?

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An 8085 assembly language program is given below. Assume that the carry flag is initially unset. The content of the accumulator after the execution of the program is
Microprocessors and Microcontrollers mcq question image

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Intel 8080 microprocessor has an instruction set of 91 instruction. The op-code to implement this instruction set should be minimum

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When the 8085 receives an interrupt on its INTR pin:

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