TRAP is . . . . . . . . whereas RST7.5, RST6.5, RST5.5 are
A. Maskable, Non Maskable
B. Maskable, Maskable
C. Non Maskable, Non Maskable
D. Non Maskable, Maskable
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Hand held programmers are used for programming
A. small PLCs
B. medium PLCs
C. large PLCs
D. none of these
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Each machine cycle of 8051 corresponds to
A. 4 clock periods
B. 12 clock periods
C. 3 clock periods
D. 6 clock periods
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In order to enable RST 5.5, RST 6.5 and RST 7.5 interrupts. Which of the following instructions are needed?
A. EI only
B. SIM only
C. EI and SIM only
D. None
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In a multi-processor configuration, two coprocessors are connected to the host 8086 processor. The two co-processor instruction sets
A. Must be the same
B. May overlap
C. Must be disjoint
D. Must be the same as that of the hoste
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Consider the following instruction:
EI
MVI A, 08H
SIM
It means
A. Disable all interrupts
B. Enable all interrupts
C. Disable RST 7.5 and 6.5
D. Enable RST 7.5 and 6.5
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The pipelined architecture of the 8086 allows the fetch & execute cycles to . . . . . . . . instructions/clock cycle
A. 1 : 4
B. 1 : 2
C. 1 : 1
D. 2 : 1
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An I/O processor controls the flow of information between
A. Cache memory and I/O devices
B. Main memory and I/O devices
C. Two I/O devices
D. Cache and main memories
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Which of the following are included in the architecture of a computer?
1. Addressing modes, CPU
2. Instruction modes, data formats
3. Secondary memory, operating system
Select the correct answer from the options given below:
A. 1 and 2
B. 1 and 3
C. 2 and 3
D. 3 only
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What is the maximum internal clock frequency of 8086 microprocessor?
A. 3 MHz
B. 16 MHz
C. 5 MHz
D. 8 MHz
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Normally PUT instruction is programmed in which part of the logic unit in a PLC program?
A. Input
B. Output
C. Either input or output
D. None of these
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The clock frequency of an 8085 microprocessor based system is 3 MHz. What should be the minimum pulse width of the INTR signal so that it is recognized successfully?
A. 5.6 µs
B. 5.7 µs
C. 5.8 µs
D. 5.9 µs
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In a 8085 microprocessor, the shift registers which store the result of an addition and the overflow bit are, respectively
A. B and F
B. A and F
C. H and F
D. A and C
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The three basic sections of microprocessor are:
A. Operand, register, ALU
B. Control and timing, register, ALU
C. Control and timing, register memory
D. ALU, memory, I/O
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The action performed by the following instruction of 8086.
MOV [1234H], AX
A. Move contents of memory location 1234 H to register AX
B. Move the contents of register AX to memory offset 1234 H
C. Add contents at 1234H to register AX
D. Add contents at 1234 H and AX and store the result in 1234 H
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What is the maximum number of I/O devices can be interfaced with 8085 using I/O mapping of I/O device technique?
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Which one of the following is not correct?
A. 8051 provides 6 interrupt sources
B. 8051 microcontroller uses memory mapped I/O through special function registers
C. Microcontrollers are generally optimized for specific applications
D. 8051 microcontroller has two 16-bit Timer/Counter registers
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An 8085 assembly language program is given below. Assume that the carry flag is initially unset. The content of the accumulator after the execution of the program is
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Intel 8080 microprocessor has an instruction set of 91 instruction. The op-code to implement this instruction set should be minimum
A. 91 bit long
B. 8 bit long
C. 7 bit long
D. 5 bit long
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When the 8085 receives an interrupt on its INTR pin:
A. the program is directly transferred to a fixed call location
B. 8085 waits till an interrupt acknowledgement is received and transfers program to a fixed call location
C. the call location is determined by an external device
D. the program is transferred to a call location indicated by HL register pair
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