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Digital Electronics
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Q101

A 5 bit DAC has a current output. For a digital input of 10100, an output current of 10 mA is produced. What will be the output current for a digital input of 11101?

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Q102

In the figure shown, X₂X₁X₀ will be 1's complement of A₂A₁A₀ if

A_{0} = A_{1} = A_{2}

Digital Electronics mcq question image

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Q103

A standard CMOS inverter is designed with equal rise and fall times (β_n = β_p). If the width of the PMOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NM_L) and the HIGH noise margin NM_H ?

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Q104

A divide-by-78 counter can be realized by using

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Q105

The circuit shown in the following figure is a . . . . . . . . gate.
Digital Electronics mcq question image

Digital Electronics mcq question image

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Q106

A 10 bit ADC has a range of ±5 V. The resolution of the ADC is approximately

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Q107

A dynamic RAM consists of

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Q108

Considering signed-magnitude representation for negative numbers, -42 will be stored into an 8-bit memory space as

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Q109

The decoding error of the counter can be avoided by

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Q110

The current mode logic (CML) is same as

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Q111

A 4-line-to-1-line multiplexer shown in figure-I (the same as per IEEE convention is shown in figure-II) is fed with three logic inputs A, B and C as shown. The output of the multiplexer will be
Digital Electronics mcq question image

Digital Electronics mcq question image

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Q112

The number FF in hexadecimal system has equivalence in decimal system to

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Q113

Negative NOR (a NOR in the negative positive logic system) becomes a Positive

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Q114

Which of the following counter can be used to divide the clock frequency of a microprocessor by 5?

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Q115

The Boolean equation

X = [(A + B) (B + C)] B

can be simplified to

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Q116

The output equivalent circuit of following circuit is
Digital Electronics mcq question image

Digital Electronics mcq question image

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Q117

The Boolean functions can be expressed in canonical SOP (sum of products) and POS (Product of sums) form. For the function,

Y = A + B C,

which are such two forms

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Q118

The sum (S) of A and B in a half Adder can be implemented by using K NAND gates. The value of K is

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Q119

A mealy state machine's output depends on

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Q120

The outputs Q and

Q

of master slave S-R flip-flop are connected to its R and S inputs respectively. The output Q when clock pulses are applied will be

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