Consider the multiplexer based logic circuit shown in the figure
Which one of the following Boolean functions is realized by the circuit?
A. F = W S 1 S 2
B. F = W S 1 + W S 2 + S 1 S 2
C. F = W + S 1 + S 2
D. F = W ⊕ S 1 ⊕ S 2
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Simplify the Boolean function F(w, x, y, z) = Σ(1, 3, 7, 11, 15) And the don't care conditions: d(w, x, y, z) = Σ(0, 2, 5)
A. F = zw + zy'
B. F' = zw' + yz
C. F' = z' + wy'
D. F = z'w + zy'
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A Boolean function f of two variables x and y is defined as follows:
f(0, 0) = f(0, 1) = f(1, 1) = 1; f(1, 0) = 0
Assuming complements of x and y are not available, a minimum cost solution for realizing f using only 2-input NOR gates and 2-input OR gates (each having unit cost) would have a total cost of
A. 1 unit
B. 4 unit
C. 3 unit
D. 2 unit
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Two's complement of the binary number 10010100 is
A. 01101011
B. 01101100
C. 11101100
D. 10001011
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What is dual of A + [B + (AC)] + D
A. A + [B (A + C)] + D
B. A[B + AC]D
C. A + [B(A + C)]D
D. A[B(A + C)]D
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A 4 : 1 multiplexer requires . . . . . . . . data selection line.
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In the 8421 BCD code the decimal number 125 is written as
A. 1111101
B. 7 D
C. 000100100101
D. None of these
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In figure below, U1 is a 4-bit binary synchronous counter with synchronous clear. Q
0 is the LSB and Q
3 is the MSB of the output.
The circuit shown in figure represents a:
A. mod 2 counter
B. mod 3 counter
C. mod 4 counter
D. mod 5 counter
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D flip-flop can be made from J-K flip-flop by making:
A. J = K = 0
B. J = K = 1
C. J = 0, K = 1
D. J = K
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The decimal equivalent of binary 1101.11 is
A. 9.75
B. 13.75
C. 11.50
D. 11.75
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For CMOS implementation of 2 input XOR logic gate, how many nMOS and pMOS transistors are required?
A. 2 nMOS and 2 pMOS
B. 3 nMOS and 3 pMOS
C. 6 nMOS and 6 pMOS
D. 8 nMOS and 8 pMOS
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The 9's complement of the decimal number 4567.86 is:
A. 5678.23
B. 5643.13
C. 5643.12
D. 5432.13
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What is output 'Z' of an EX-OR gate, where all inputs are set at A
A. Z = A
B. Z = A
C. Z = 1
D. Z = 0
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The dual of A + B + C is
A. A.B.C
B. ( A + B ) + C
C. ( A + B ) . C
D. A + B.C
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The counter that has a modulus of 64 should use a minimum of
A. Six flip-flops
B. Six J-K flip-flops
C. Six D- flip-flops
D. 64 T flip-flops
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Consider a multiplexer with X and Y as data inputs and Z as control input. Z = 0 selects input X and Z = 1 selects input Y. What are the connections required to realize the 2-variable Boolean function f = T + R, without using any additional hardware?
A. R to X, 1 to Y, T to Z
B. T to X, R to Y, T to Z
C. T to X, R to Y, 0 to Z
D. R to X, 0 to Y, T to Z
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The size of PROM needed to implement a dual 8-to-1 multiplexer with common selection inputs would be
A. 256 K × 2
B. 512 K × 2
C. 1024 K × 2
D. None of these
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What are the counting states (Q
1 , Q
2 ) for the counter shown in the figure below?
A. 11, 10, 00, 11, 10, . . . .
B. 01, 10, 11, 00, 01, . . . .
C. 00, 11, 01, 10, 00, . . . .
D. 01, 10, 00, 01, 10, . . . .
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Given below are three types of converters:
1. Successive approximation type
2. Weighted resistor type
3. R-2R ladder type
Which of these type are D to A converters?
A. Only 1 and 2
B. Only 2 and 3
C. Only 1 and 3
D. 1, 2 and 3
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Find the equivalent binary value of (36.75)10
A. 100100.10
B. 010101.01
C. 100100.11
D. 110011.01
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