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Digital Electronics
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A 12-bit ADC is employed to convert an analog voltage of zero to 10 volts. The resolution of the ADC is

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What is the maximum clock frequency at which following circuit can be operated without timing violations? Assume that the combinational logic delay is 10 ns and the clock duty cycle varies form 40% to 60%
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A sequential circuit using D Flip-Flop and logic gates is shown in the figure, where X and Y are the inputs and Z is the output. The circuit is
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The output of the 74 series gate of TTL gates is taken from a BJT in

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The circuit shown in the figure has 4 boxes each described by inputs P, Q, R and outputs Y, Z with
The circuit acts as a
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For the gate in the given figure the output will be . . . . . . . .
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The 54/74164 chip is as 8-bit serial-input-parallel-output shift register. The clock is 1 MHz. The time needed to shift an 8-bit binary number into the chip is

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For the code X1 = (000, 111) how many errors can be successfully detected?

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IC 74 HC00 series belong to,

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In S-R latch, when the SET input is made high, output Q becomes:

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Both transistors T1 and T2 shown in the figure, have a threshold voltage of 1 Volts. The device parameters K1 and K2 of T1 and T2 are respectively, 36 µA/V2 and 9 µA/V2. The output voltage V0 is
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In the following state table, the equivalent states are
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The expression for the truth table given below in POS form is given by:
A     B C F
0     0 0 1
0     0 1 0
0     1 0 1
0     1 1 1
1     0 0 1
1     0 1 1
1     1 0 1
1     1 1 0

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Consider the following statements regarding configuration of TTL devices:
1. The output impedance of totem pole transistor is high.
2. Open collector output devices have low switching speed.
3. Power consumption of Schottky devices is high.
4. Tri-state output devices have high switching speed.
Of these statements:

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An input frequency of 12 KHz is applied to the J-K flip-flops arrangement shown in the given figure. The resulting output frequency will be
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Consider the Karnaugh map given below : The function represented by this map can be simplified to the minimal form as
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Which one of the following Boolean expressions is NOT correct?

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The number of digit 1 present in the binary representation of 3 × 512 + 5 × 64 + 7 × 8 + 3 is:

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The fastest ADC among the following is

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What will be the simplified Boolean function of the given equation? F(a, b, c) = Σ(0, 2, 4, 5, 6)

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